1. Field of the Invention
The invention relates to memories, and more particularly to flash memories.
2. Description of the Related Art
A flash storage device stores data for a host and processes write commands sent from the host. The flash storage device comprises a flash memory and a controller. When the controller receives a write command from the host, the controller writes data to the flash memory according to the write command. The flash memory comprises a plurality of blocks, and each block comprises a plurality of pages for data storage. Each page of a block corresponds to a unique physical address. The host specifies data of a page or a block according a logical address. The physical addresses are converted to the logical addresses according to a 1-to-1 mapping relationship.
When the host wants to replace original data stored in a logical address with updated data, because the original data has been stored in an old block corresponding to the logical address, the controller cannot directly write the updated data to the old block of the logical address. The controller therefore writes the updated data to a new block. The new block storing updated data therefore has the same logical address as the logical address of the old block, and the new block therefore corresponds to the old block. Ordinarily, the old block is referred to as a mother block. The new block is named as a file allocation table (FAT) block or a child block according to the format thereof. If the new block can only be written with data with continuous addresses, the new block is referred to as a child block. If the new block can be written with data with discontinuous addresses, the new block is referred to as an FAT block.
The child block can only be written with data with continuous addresses. When the controller receives a write command comprising updated data with discontinuous addresses, the controller cannot directly write the updated data to the child block. The controller therefore performs data integration of the mother block and the child block to obtain an integrated block. In addition, the FAT block has limited data capacity. When the controller receives a write command comprising updated data to be written to an FAT block, and the FAT block is full of data, thus, the controller cannot write the updated to the FAT block. The controller therefore performs data integration of the mother block and the FAT block to obtain an integrated block.
With improved manufacturing technology of flash memory chips, a block of a flash memory chip now has more and more pages, increasing the data capacity of the flash memory chip. The speed for a controller to write data to the flash memory chip, however, has not correspondingly increased. When data integration of a mother block and an FAT block is performed, the data integration takes a lot of time and results in system delay. The controller, however, only has a limited processing time of 250 ms to process a write command. If processing of a write command requires data integration of a mother block, an FAT block, and a child block, the data integration requires a time period longer than 250 ms, leading to errors in the data writing process. Thus, a data writing method is required to complete data integration in compliance with the limitations of the 250 ms processing period of write commands.